This invention concerns a semiconductor manufacturing technique and, more in particular, it relates to a technique useful when applied to a method of manufacturing a lithium cell monitoring module.
As an example of module products in which surface mounted chip parts such as chip capacitors or chip resistors and semiconductor chips for bear chip mounting (semiconductor device), those so-called lithium cell monitoring module have been developed. The chip parts and semiconductor chips are mounted on a module substrate by soldering connection, and both of them are protected by being covered with a highly elastic insulative resin.
The structure in which the chip parts (surface mounted parts) and the semiconductor chips are mounted and both of them are covered with a resin is described, for example, in Japanese Published Unexamined Patent Application No. 2000-223623 and No. Hei 11(1999)-238962.
At first, Japanese Published Unexamined Patent Application No. 2000-223623 describes a technique of making the modulus of elasticity of a first resin that covers wire bonded semiconductor chips and wires thereof greater than the modulus of elasticity of a second resin that covers the outside thereof to make the first resin harder than the second resin to suppress deformation of the first resin by thermal stresses thereby preventing disconnection of the wires.
Further, Japanese Published Unexamined Patent Application No. Hei 11(1999)-238962 describes a technique of connecting a semiconductor device to a substrate by soldering connection by way of solder bumps and also solder connecting other surface mounted parts to the substrate and further covering the semiconductor device and other surface mounted parts with a silicone gel, without wire connection, thereby reducing the occupying area and the height of the module and reducing the loss.
However, the present inventor has found the following problems regarding the semiconductor device of a structure in which the chip parts (surface mounted parts) and the semiconductor chips are mounted and both of them are covered with resin.
That is, the semiconductor device (such as module products) are soldered by secondary mounting reflow to a mounting substrate such as a printed wiring substrate in which solder is melted again at the soldered parts (surface mounted parts) in the module to cause disadvantages such as short-circuit.
In this phenomenon, when the solder is melted again, the melt expanding pressure causes peeling at the boundary between the parts and the resin or at the boundary between the resin and the module substrate to which solder intrudes in flash to connect terminals on both ends of the surface mounted parts, leading to short-circuit.
As the countermeasure for the short-circuit, it may be considered a structure in which the internal solder does not melt in the secondary mounting reflow or a structure to moderate the melting expansion pressure of the solder even when it is melted, not to cause peeling at the boundary between the part and the resin or at the boundary between the resin and the module substrate.
In view of the above, as the former countermeasure, it may be considered to use a high melting solder for the internal solder. In this case, however, Snxe2x80x94Pd solder is previously formed to the terminal of the surface mounted parts and, further, gold plating is applied to the terminals of the module substrate in a module to be applied with wire bonding. Accordingly, it has been found that since impurities such as Sn or gold is mixed with the internal solder and the melting point of the solder is lowered upon secondary mounting reflow of the module even if a high melting solder is used to melt the internal solder and, as a result, the use of the high melting solder is not effective.
On the other hand, as the latter countermeasure, it may be considered to use a gel resin of a low hardness (modulus of elasticity) to moderate the melting expansion pressure of the molten internal solder but this involves a problem that the protection function (mechanical strength) to the inside of the module is small.
In this case, while it is possible to protect by covering with a casing or a cap but this involves a problem of increasing the cost.
Further, it may also be considered to use a low melting solder upon secondary mounting reflow of the module, since the life of the low melting solder is short, it gives a problem of low reliability in a temperature cycle test.
Japanese Published Unexamined Patent Application No. 2000-223623 has neither the description for technique of covering the wire bonded surface mounted parts (semiconductor chips) with a resin of low modulus of elasticity nor the description of mentioning short-circuit caused by the melting expansion pressure of the internal solder upon secondary mounting reflow of the module as a problem.
Further, Japanese Published Unexamined Patent Application No. Hei 11(1999)-238962 describes a structure of covering the solder connected semiconductor devices or other surface mounted parts with a gel resin of low modulus of elasticity, but it neither contains description for an actual allowable range for the modulus of elasticity of the gel resin nor contains description that points out the short-circuit problem caused by the melting expansion pressure of the internal solder upon secondary mounting reflow of the module. Further, it describes a structure covering the outside of the gel resin with a casing, but the use of the casing gives a problem of increasing the cost.
This invention intends to provide a semiconductor device capable of preventing short circuit caused by flowing out of a solder by re-melting in the semiconductor device, as well as a manufacturing method thereof.
This invention further intends to provide a semiconductor device for reducing the cost, as well as a manufacturing method thereof.
This invention further intends to provide a semiconductor device capable of coping with Pb free trend and a manufacturing method thereof.
These and other objects and novel features of this invention will become apparent by reading the description of the specification and the appended drawings.
Outlines of the typical inventions among those disclosed in the present application are simply explained below.
That is, the semiconductor device according to this invention comprises surface mounted parts mounted by soldering, a wiring substrate on which the surface mounted parts are mounted, solder connection portions for connecting the surface mounted parts to the wiring substrate, and a sealing portion formed with an elastic insulative resin for covering the surface mounted parts and the solder connection portions, in which the elastic resin is a resin having a modulus of elasticity of 200 MPa or less at a temperature of 150xc2x0 C. or higher.
According to this invention, even when internal solder connection portions are melted again upon mounting the semiconductor device in secondary mounting reflow, the pressure caused by the melting expansion can be moderated with the elastic resin and, as a result, it can prevent peeling at the boundary between the surface mounted parts and the resin, or at the boundary between the resin and the module substrate.
This can prevent flow out of the solder to the boundary to prevent occurrence of short circuit between terminals in the surface mounted parts.
Further, the semiconductor device according to this invention comprises a surface mounted parts to be solder mounted, a wiring substrate on which the surface mounted parts are mounted, solder connection portions for connecting the surface mounted parts to the wiring substrate, and a sealing portion formed with a silicone resin as an elastic insulative resin for covering the surface mounted parts and the solder connection portions.
Further, the semiconductor device according to this invention comprises semiconductor chips as a surface mounted parts formed at the main surface thereof with surface electrodes, chip parts as the surface mounted parts each formed with connection terminals on both ends thereof, a module substrate as a wiring substrate on which the semiconductor chips and the chip parts are mounted, solder connection portions for connecting the chip parts to the wiring substrate, and a sealing portion formed of a silicone resin which is an elastic insulative resin for covering the semiconductor chips, the chip parts and the solder connection portions.
Further, the semiconductor device according to this invention comprises semiconductor chips as the surface mounted parts each formed at the main surface with a surface electrode, chip parts as the surface mounted parts each formed with connection terminals on both ends, a module substrate as a wiring substrate on which the semiconductor chips and the chip parts are mounted, solder connection portions for connecting the chip parts to the wiring substrate, and a sealing portion formed of an insulative resin having a modulus of elasticity of 1 MPa or more and 200 MPa or less at a temperature of 150xc2x0 C. or higher and having a modulus of elasticity of 200 MPa or more at a temperature of 25xc2x0 C., for covering the semiconductor chips, the chip parts and the solder connection portions.
Further, the method of manufacturing the semiconductor device according to this invention includes a step of mounting surface mounted parts by soldering connection to a wiring substrate and a step of covering and resin encapsulating the solder connection portions formed by the soldering connection and the surface mounted parts with an elastic insulative resin having a modulus of elasticity of 200 MPa or less at a temperature of 150xc2x0 C. or higher.
Further, the method of manufacturing a semiconductor device according to this invention comprises:
a step of providing a substrate to prepare multiple segments in which plural device regions are partitioned and formed by partition lines; a step of mounting surface mounted parts to the device regions by solder connection; a step of collectively covering and resin encapsulating the solder connection portions of plural device regions formed by solder connection and the surface mounted parts with an elastic insulative resin and forming a collective sealing portion on the substrate to prepare multiple segments; a step of forming cut-in portions on the surface of a collective sealing portion along divisional lines corresponding to and on the opposite side of the partition lines of the substrate to prepare plural segments; and a step of dividing the substrate to prepare multiple segments along the division lines and dividing the collective sealing portion by cut-in portions into individual segments.
A method of manufacturing a semiconductor device according to this invention comprises: a step of providing a substrate to prepare multiple segments in which plural device regions are partitioned and formed by partition lines; a step of mounting surface mounted parts to the device regions by solder connection; a step of collectively covering and resin encapsulating the solder connection portions of plural device regions formed by solder connection and the surface mounted parts with an elastic insulative resin and forming a collective sealing portion on the substrate to prepare multiple segments; a step of applying identification marks by laser on every device regions on the surface of the collective sealing portion; and a step of dividing the substrate to prepare plural segments into segments along division lines corresponding to and on the opposite side of the partition lines.
A method of manufacturing a semiconductor device according to this invention comprises: a step of providing a substrate to prepare multiple segments in which plural device regions are partitioned and formed by partition lines; a step of mounting surface mounted parts to the device regions by solder connection; a step of applying printing by using a squeezer so as to collectively cover solder connection portions of plural device regions formed by solder connection and the surface mounted parts with an elastic insulative resin, thereby forming a collective sealing portion on the substrate to prepare multiple segments; and a step of dividing the substrate to prepare plural segments into individual segments along division lines corresponding to and on the opposite side of the partition lines.
A method of manufacturing a semiconductor device according to this invention comprises: a step of providing a substrate to prepare multiple segments in which plural rectangular device regions are partitioned by partition lines; a step of mounting chip parts and semiconductor chips as the surface mounted parts by solder connection to the device region; a step of wire bonding the surface electrodes of the semiconductor chips and the substrate terminals of the device regions of the substrate to prepare multiple segments by forming wire loops of gold wires in the direction parallel with the longitudinal direction of the device regions; a step of collectively covering and resin encapsulating the solder connection portions of the plural device regions formed by the soldering connection and the surface mounted parts with an elastic insulative resin thereby forming a collective sealing portion on the substrate to prepare plural segments; and a step of primarily dividing the substrate to prepare multiple segments with division lines along the longitudinal direction of the device region and corresponding to and opposite side on the partition lines and secondarily dividing one row segment group formed by the primary division along the division lines in parallel with the lateral direction thereof into individual segments.